DocumentCode
2672679
Title
Investigation of Plasma Charging damage impact on device and gate dielectric reliability in 180nm SOI CMOS RF switch technology
Author
Ioannou, D.P. ; Harm, D. ; Abadeer, W.
Author_Institution
IBM Syst. & Technol. Group, Essex Junction, VT, USA
fYear
2009
fDate
26-30 April 2009
Firstpage
1011
Lastpage
1013
Abstract
The impact of charging damage from plasma processes on device and gate dielectric reliability is investigated for MOSFETs fabricated in an SOI CMOS RF Switch technology. Although results from voltage breakdown measurements do not reveal any indication of plasma damage, detrimental antenna effects are observed on the negative bias temperature instability (NBTI) and hot carrier device performance. With regard to NBTI in P-channel SOI MOSFETs in particular, relaxation experiments are carried out under various bias conditions. Recovery effects which are well known for intrinsic NBTI are also observed for the antenna devices, but are found to be reduced relative to that of control devices.
Keywords
CMOS integrated circuits; MOSFET; hot carriers; plasma materials processing; semiconductor device measurement; semiconductor device reliability; semiconductor switches; silicon-on-insulator; thermal stability; voltage measurement; MOSFET fabrication; NBTI; SOI CMOS RF switch technology; gate dielectric reliability; hot carrier device performance; negative bias temperature instability; plasma charging damage impact; recovery effect; size 180 nm; voltage breakdown measurements; CMOS technology; Dielectric devices; MOSFETs; Niobium compounds; Plasma devices; Plasma measurements; Plasma temperature; Radio frequency; Switches; Titanium compounds;
fLanguage
English
Publisher
ieee
Conference_Titel
Reliability Physics Symposium, 2009 IEEE International
Conference_Location
Montreal, QC
ISSN
1541-7026
Print_ISBN
978-1-4244-2888-5
Electronic_ISBN
1541-7026
Type
conf
DOI
10.1109/IRPS.2009.5173401
Filename
5173401
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