An optimized layout with split bus capacitors in eGaN-based integrated DC-DC converter module

Author

Wang Kangping ; Ma Huan ; Yang Xu ; Zeng Xiangjun ; Li Guoqing

Author_Institution

State Key Lab. of Electr. Insulation & Power Equip., Xi´an Jiaotong Univ., Xi´an, China

fYear

2014

fDate

5-8 Nov. 2014

Firstpage

446

Lastpage

450

Abstract

This paper carefully discusses the interaction between the bus capacitors and the parasitic inductances in an integrated DC-DC converter module. The design principles of the bus capacitors are presented and validated by simulation results. In addition, an optimized PCB layout with split bus capacitors is proposed for enhancement-mode Gallium-Nitride (eGaN) transistors based integrated DC-DC power converter module. The power loop inductance is about 0.2nH extracted by Maxwell 3D simulation, which is reduced by 50% than that of the reported best layout. The results are validated by a buck converter operating at input voltage of 12V, output voltage of 3.3V, output current of 8A, and switching frequency of 1MHz.

Keywords

DC-DC power convertors; III-V semiconductors; high electron mobility transistors; inductance; monolithic integrated circuits; power capacitors; printed circuit layout; wide band gap semiconductors; GaN; Gallium Nitride high electron mobility transistors; Maxwell 3D simulation; PCB layout optimization; buck converter; current 8 A; eGaN-based integrated DC-DC converter module; enhancement-mode gallium nitride transistor; frequency 1 MHz; power loop inductance; split bus capacitor; switching frequency; voltage 12 V; voltage 3.3 V; Capacitance; Capacitors; Impedance; Inductance; Layout; Switches; Switching frequency; DC-DC power converter; Gallium Nitride; integrated module; layout; parasitic inductance;

fLanguage

English

Publisher

ieee

Conference_Titel

Electronics and Application Conference and Exposition (PEAC), 2014 International

Conference_Location

Shanghai

Type

conf

DOI

10.1109/PEAC.2014.7037897

Filename

7037897