DocumentCode :
2674371
Title :
Discrete cosine transform(DCT)-based reconfigurable system design
Author :
Alluru, Mandeep ; Ahn, In Soo ; Lu, Yufeng
Author_Institution :
Dept. of Electr. & Comput. Eng., Bradley Univ., Peoria, IL, USA
fYear :
2011
fDate :
15-17 May 2011
Firstpage :
1
Lastpage :
4
Abstract :
In this paper, a DCT-based image processing system is developed on Xilinx Spartan3E Field Programmable Gate Array (FPGA) device using embedded development kit (EDK) tools from Xilinx. Two different hardware architectures of two-dimensional (2-D) DCT have been implemented as a coprocessor in an embedded system. One is direct implementation of 2-D DCT by cascading two 1-D DCT. Another is 2-D DCT implementation with control and architecture optimization. In addition, the hardware cost of these two architectures is compared for benchmark images.
Keywords :
coprocessors; digital signal processing chips; discrete cosine transforms; field programmable gate arrays; image processing; reconfigurable architectures; DCT-based image processing system; DSP chip; EDK); FPGA; Xilinx Spartan3E field programmable gate array device; architecture optimization; coprocessor; discrete cosine transform-based reconfigurable system design; embedded development kit tools; embedded system; Computer architecture; Coprocessors; Discrete cosine transforms; Embedded systems; Field programmable gate arrays; Hardware; Program processors; DCT; EDK; FPGA; FSL; MicroBlaze;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electro/Information Technology (EIT), 2011 IEEE International Conference on
Conference_Location :
Mankato, MN
ISSN :
2154-0357
Print_ISBN :
978-1-61284-465-7
Type :
conf
DOI :
10.1109/EIT.2011.5978631
Filename :
5978631
Link To Document :
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