• DocumentCode
    2674909
  • Title

    Validation study of compact thermal resistance models of IC packages

  • Author

    Yang, Zemo ; Kwon, Young

  • Author_Institution
    IC Package Technol. Dev., Philips Semicond., Sunnyvale, CA, USA
  • fYear
    1996
  • fDate
    28-31 May 1996
  • Firstpage
    165
  • Lastpage
    171
  • Abstract
    Accurate estimation of the operating temperature of a semiconductor IC device encapsulated within an electronic package is necessary to ensure reliable performance over the life of the product. The common lumped constant Theata JA (φja) characterized in laboratory setups, was found to be too dependent on mounting and environmental conditions to be effective in practical system applications. Two improved compact models of electronic package thermal characteristics, the Bar-Cohen and Lasance, were analyzed for accuracy in particular situations. A further refinement of the Bar-Cohen and Lasance compact models proposed in this paper was found to be more robust and valid in complicated system applications. The less used but effective lumped constant, Theata JL (φjl), which describes the junction to package lead relationship, was also studied. It was found to be useful for quick determination of junction temperature in equilibrium system mounted operating condition. Also covered in this work is a discussion from the theoretical network point of view as well as suggestions of modeling methodologies for board mounted plastic packages
  • Keywords
    equivalent circuits; integrated circuit modelling; integrated circuit packaging; plastic packaging; temperature distribution; thermal analysis; thermal resistance; Bar-Cohen model; IC packages; Lasance model; board mounted plastic packages; compact thermal resistance models; electronic package thermal characteristics; equilibrium system mounted operating condition; junction temperature; junction to package lead relationship; operating temperature estimation; semiconductor IC device; Electronic packaging thermal management; Integrated circuit modeling; Integrated circuit packaging; Life estimation; Plastics; Robustness; Semiconductor device packaging; Semiconductor device reliability; Temperature; Thermal resistance;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronic Components and Technology Conference, 1996. Proceedings., 46th
  • Conference_Location
    Orlando, FL
  • ISSN
    0569-5503
  • Print_ISBN
    0-7803-3286-5
  • Type

    conf

  • DOI
    10.1109/ECTC.1996.517389
  • Filename
    517389