DocumentCode
2675148
Title
Improved frequency domain architecture for the digital block of a hardware simulator for MIMO radio channels
Author
Habib, Bachir ; Zaharia, Gheorghe ; Zein, G.E.
Author_Institution
Inst. d´´Electron. et de Telecommun. de Rennes, Rennes, France
fYear
2011
fDate
June 30 2011-July 1 2011
Firstpage
1
Lastpage
4
Abstract
This paper presents a new frequency domain architecture for the digital block of a hardware simulator of MIMO propagation channels. This simulator can be used for UMTS and WLAN applications in indoor and outdoor environments. A hardware simulator must reproduce the behavior of the radio propagation channel, thus making it possible to test “on table” the mobile radio equipments. The advantages are: low cost, short test duration, possibility to ensure the same test conditions in order to compare the performance of various equipments. After the presentation of the general characteristics of the hardware simulator, the new architecture of the digital block is presented and designed on a Xilinx Virtex-IV FPGA, and its accuracy is analyzed.
Keywords
3G mobile communication; MIMO communication; mobile radio; wireless LAN; wireless channels; MIMO propagation channels; MIMO radio channels; UMTS; WLAN; digital block; frequency domain architecture; hardware simulator; mobile radio; 3G mobile communication; Computer architecture; Field programmable gate arrays; Frequency domain analysis; Hardware; MIMO; Wireless communication; FPGA; Hardware Simulator; MIMO; Radio Channel;
fLanguage
English
Publisher
ieee
Conference_Titel
Signals, Circuits and Systems (ISSCS), 2011 10th International Symposium on
Conference_Location
lasi
Print_ISBN
978-1-61284-944-7
Type
conf
DOI
10.1109/ISSCS.2011.5978678
Filename
5978678
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