Title :
Full band UWB LNA with 8kV+ ESD protection in RFCMOS
Author :
Wang, X. ; Fan, S. ; Qin, B. ; Liu, J. ; Lin, L. ; Tang, H. ; Zhao, H. ; Fang, Q. ; Wang, A. ; He, J. ; Zhao, B. ; Wong, R. ; Wen, S.-J.
Author_Institution :
Dept. of Electr. Eng., Univ. of California, Riverside, CA, USA
Abstract :
This paper reports a single-chip full-band 3.1 10.6GHz ESD UWB LNA featuring cascode shunt-series feedback topology and very robust whole-chip ESD protection. Careful ESD+LNA co-design was excised to achieve full-chip circuit optimization with high ESD protection. This design is implemented in a foundry 0.18μm RFCMOS process. Measurement shows the highest reported ESD protection of 8.25kV, a peak gain of 10.9dB, a good gain flatness of 3.64%/GHz across 3.1-10.6GHz, low input reflection of <;-10dB, noise figure of 4.98dB, group delay of 103±35pS and good linearity with P1.dB=2.88dBm@7GHz.
Keywords :
CMOS analogue integrated circuits; electrostatic discharge; low noise amplifiers; microwave amplifiers; microwave integrated circuits; ultra wideband technology; cascode shunt-series feedback topology; foundry RF CMOS process; frequency 3.1 GHz to 10.6 GHz; full band UWB LNA; gain 10.9 dB; noise figure 4.98 dB; size 0.18 mum; very robust whole-chip ESD protection; voltage 8 kV; voltage 8.25 kV; Degradation; Electrostatic discharge; Frequency measurement; Gain; Noise measurement; Testing; Transmission line measurements; ESD Protection; IC; LNA; RF; UWB; codesign;
Conference_Titel :
Radio and Wireless Symposium (RWS), 2011 IEEE
Conference_Location :
Phoenix, AZ
Print_ISBN :
978-1-4244-7687-9
DOI :
10.1109/RWS.2011.5725431
