Title :
The 2nd order analysis of IDDQ test data
Author :
Li, Shengli ; Zhang, Kai ; Lo, Jien-Chung
Author_Institution :
Dept. of Electr. & Comput. Eng., Rhode Island Univ., Kingston, RI, USA
Abstract :
The proposed 2nd order current signature technique considers both the 1st order mean and the 2nd order variance information to provide a more robust and more effective means of die selection. We examined the IDDQ testing data from SEMATECH by the proposed 2nd order current signature technique and compared the results to those of traditional single threshold and delta IDDQ techniques. We found that the 2nd order analysis may enable a more robust way to implement IDDQ testing. In particular, a clear distinction can be made between defected and defect-free dies. The defected dies identified by the proposed technique and by the delta-IDDQ technique are quite similar for the SEMATECH data. However, for the future deep sub-micron VLSI where the mean IDDQ value may vary significantly, the proposed technique has a definite advantage of being more robust
Keywords :
CMOS integrated circuits; VLSI; integrated circuit testing; leakage currents; IDDQ test data; SEMATECH data; deep submicron VLSI; defect-free dies; defected dies; die selection; order current signature technique; robust IDDQ testing; second-order analysis; Circuit testing; Energy consumption; Fabrication; Gaussian distribution; Histograms; Leakage current; Manufacturing; Neodymium; Robustness; Very large scale integration;
Conference_Titel :
Defect and Fault Tolerance in VLSI Systems, 2000. Proceedings. IEEE International Symposium on
Conference_Location :
Yamanashi
Print_ISBN :
0-7695-0719-0
DOI :
10.1109/DFTVS.2000.887178
