Title :
Accurate analog/RF BIST evaluation based on SVM classification of the process parameters
Author :
Bounceur, Ahcene ; Brahmi, Belkacem ; Beznia, Kamel ; Euler, Reinhardt
Author_Institution :
Lab.-STICC Lab., Univ. of Brest, Brest, France
Abstract :
The analog/RF functional test which is based on specification circuit testing is very costly due to lengthy test times and highly sophisticated test equipment. Alternative test measures, extracted by means of Built-in Self Test (BIST) techniques, are a promising approach to replace standard specification-based tests. However, these test measures must be evaluated at the design stage by estimating the Test Escapes (Te) and the Yield Loss (Yl). An accurate estimation of these metrics requires a large non-biased sample of circuit instances including parametric defective ones. A necessary number of these circuits cannot be obtained with a Monte Carlo simulation alone. Statistical learning techniques, in combination with Monte Carlo simulation, can allow the generation of such a sample for multivariate test metrics estimation. The development of Extreme Value Theory (EVT) has provided a rigorous tool for the computation of parametric test metrics. However, this theory is very complex and difficult to apply in the case of multivariate problems. In this paper, we propose an improvement of this approach. The classification of the circuits is based on the specifications and the test limits instead of the extreme thresholds and no post-classification simulation is necessary. Also, we illustrate the use of this model for the evaluation of a filter BIST technique.
Keywords :
Monte Carlo methods; analogue integrated circuits; built-in self test; support vector machines; EVT; Monte Carlo simulation; SVM classification; analog-RF functional test; built-in self test techniques; circuit instances; extreme value theory; filter BIST technique; multivariate problems; multivariate test metrics estimation; specification circuit testing; statistical learning techniques; test escapes; tield loss; Circuit faults; Estimation; Measurement; Monte Carlo methods; Oscillators; Standards; Support vector machines; BIST evaluation; Support Vector Machines; analog/RF test; classification;
Conference_Titel :
Design & Test Symposium (IDT), 2014 9th International
Conference_Location :
Algiers
DOI :
10.1109/IDT.2014.7038587