Rapid prototyping of PVS into FPGA: From model based design to FPGA/ASICs implementation

A wide variety of maximum power point tracking (MPPT) algorithms for photovoltaic systems (PVS) have been proposed and developed. These MPPT algorithms vary in many aspects such as the selected criteria and techniques used. In this paper, we propose an effective design methodology for hardware implementation of PVS into FPGA/ASICs. To achieve our goal, we propose the application of the model based design at high level using the Matlab/Simulink which includes the HDL Coder Tool. The approach will assist the designer to develop and prototype in a relatively short time by eliminating time consuming and error prone due to manual coding. The proposed design methodology has been applied to the well know Pertub and Observe (P&O) MPPT controller. The Matlab/Simulink model of the P&O controller is optimized and converted to target, Hardware Description Language (HDL) code for FPGA/ASIC. The whole architecture of the P&O controller has been implemented on a Xilinx Spartan 3E prototyping board. We demonstrate that the generated RTL code can be easily mapped into FPGA/ASICs, which allow the rapid prototyping of PVS with more complex algorithms.