DocumentCode
2678037
Title
Divergent path random number generators
Author
Mitchum, Samuel T., Jr. ; Klenke, Robert H.
fYear
2009
fDate
5-8 March 2009
Firstpage
109
Lastpage
114
Abstract
This paper presents a class of digital true random number generators. The random number generators can be described using any digital design methodology such as HDL descriptions or logic diagrams. Hence these types of true random number generators are easily implemented in FPGAs and ASICs. Several components are presented along with implementation details and test results. These particular designs generate 32 bit random numbers but the principle is easily extended to any desired bit length.
Keywords
application specific integrated circuits; field programmable gate arrays; logic design; random number generation; ASIC; FPGA; HDL descriptions; digital design methodology; digital true 32-bit random number; divergent path random number generator; logic diagrams; storage capacity 32 bit; Circuit noise; Cryptography; Design methodology; Field programmable gate arrays; H infinity control; Hardware design languages; Logic design; Propagation delay; Random number generation; Testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Southeastcon, 2009. SOUTHEASTCON '09. IEEE
Conference_Location
Atlanta, GA
Print_ISBN
978-1-4244-3976-8
Electronic_ISBN
978-1-4244-3978-2
Type
conf
DOI
10.1109/SECON.2009.5174059
Filename
5174059
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