DocumentCode :
2678783
Title :
Wide-division-range high-speed fully programmable frequency divider
Author :
Sleiman, Sleiman Bou ; Atallah, Jad G. ; Rodriguez, Saul ; Rusu, Ana ; Ismail, Mohammed
Author_Institution :
Analog VLSI Lab., Ohio State Univ., Columbus, OH
fYear :
2008
fDate :
22-25 June 2008
Firstpage :
17
Lastpage :
20
Abstract :
This paper presents the design and implementation of an all-programmable frequency divider with an ultra-wide division range for use in phase-locked loops. The proposed divider uses a fully modular architecture and dynamic logic - implemented in TSMC 0.18 mum - and can divide input frequencies up to 7.55 GHz by any ratio between 8 and 255 while consuming 11 mW from a 1.8 V power supply. The divider compares very favorably to other implementations reported in literature in terms of division range and frequency of operation.
Keywords :
analogue integrated circuits; frequency dividers; high-speed integrated circuits; phase locked loops; programmable circuits; TSMC; dynamic logic; frequency synthesizers; high-speed fully programmable frequency divider; high-speed integrated circuits; modular architecture; phase-locked loops; power 11 mW; size 0.18 mum; ultra-wide division range; voltage 1.8 V; Circuit topology; Counting circuits; Delay; Energy consumption; Frequency conversion; Frequency synthesizers; Latches; Logic gates; Phase locked loops; Very large scale integration; frequency synthesizers; high-speed; integrated circuits; prescalers;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems and TAISA Conference, 2008. NEWCAS-TAISA 2008. 2008 Joint 6th International IEEE Northeast Workshop on
Conference_Location :
Montreal, QC
Print_ISBN :
978-1-4244-2331-6
Electronic_ISBN :
978-1-4244-2332-3
Type :
conf
DOI :
10.1109/NEWCAS.2008.4606310
Filename :
4606310
Link To Document :
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