A 15 Bit 95 dB Low Power Discrete Time Sigma Delta Modulator

This paper presents a high resolution low power sigma delta modulator for analog to digital conversion (ADC) over 5 MHz band. The modulator consists of a third order design operating at a Sampling Frequency of 1 GHz, thus giving an over sampling ratio (OSR) of 100. A Discrete Time Switched Capacitor based design is implemented, which achieves a Signal to Quantization Noise Ratio (SQNR) of 95.3dB, leading to a 15 bit resolution of the ADC. A very low power consumption of 2.3mW at a supply voltage of 1.8V is achieved in 0.18micron CMOS technology. The 60 meter band or 5 MHz band is a relatively new amateur radio band that is useful for disaster management and this paper presents an ADC that can be used for this band.