An Efficient Distributive Arithmetic Based 3-Dimensional Discrete Wavelet Transform for Video Processing

Author

Hegde, Ganapathi ; Vaya, Pukhraj

Author_Institution

Dept. of ECE, Amrita Vishwa Vidyapeetham, Bangalore, India

fYear

2011

fDate

20-22 July 2011

Firstpage

1

Lastpage

6

Abstract

This paper presents an efficient Distributive arithmetic (DA) based parallel processor based architecture to realize 3-Dimensional Discrete wavelet transform (3- D DWT) architecture. Basic DA is modified suitably to employ in 3-D DWT. Parallel processing DA architecture employing modified DA algorithm is designed, modeled and implemented on FPGA. The modified DA reduces the storage space and power consumption by 93% and 4% respectively. The parallel processing 3-D DWT architecture realized using modified DA produces a time delay of 65ns and consumes a power of 108mW. The designed parallel processing based 3-D DWT architecture can be used for video processing applications.

Keywords

discrete wavelet transforms; field programmable gate arrays; parallel processing; video signal processing; 3D discrete wavelet transform architecture; DA algorithm; FPGA; distributive arithmetic based parallel processor; field programmable gate array; parallel processing; power 108 mW; power consumption reduction; storage space reduction; video processing; Clocks; Discrete wavelet transforms; Field programmable gate arrays; Read only memory; Registers; Table lookup;

fLanguage

English

Publisher

ieee

Conference_Titel

Process Automation, Control and Computing (PACC), 2011 International Conference on

Conference_Location

Coimbatore

Print_ISBN

978-1-61284-765-8

Type

conf

DOI

10.1109/PACC.2011.5978992

Filename

5978992