DocumentCode :
2680879
Title :
Optimizing Arithmetic Elements For Signal Processing
Author :
Callaway, Thomas K. ; Swartzlander, Earl E.
Author_Institution :
University of Texas at Austin
fYear :
1992
fDate :
28-30 Oct 1992
Firstpage :
91
Lastpage :
100
Keywords :
Adders; CMOS logic circuits; Circuit simulation; Digital arithmetic; Digital signal processing; Energy consumption; Power dissipation; Power measurement; Signal processing; Switching circuits;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Signal Processing, V, 1992., [Workshop on]
Print_ISBN :
0-7803-0811-5
Type :
conf
DOI :
10.1109/VLSISP.1992.639176
Filename :
639176
Link To Document :
https://search.ricest.ac.ir/dl/search/defaultta.aspx?DTC=49&DC=2680879
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