DocumentCode :
2681146
Title :
A Reconfigurable Arithmetic Processor
Author :
Rajagopal, Arjun ; Kuttanna, Belliappa ; Janakiraman, Balaji ; Mukherjee, Rajarshi ; Shetler, Joy
Author_Institution :
Texas A&M University
fYear :
1993
fDate :
3-6 Jan 1993
Firstpage :
172
Lastpage :
175
Keywords :
Artificial intelligence; Computer science; Convolution; Coprocessors; Digital arithmetic; Digital signal processing; Hardware; Pipelines; Pixel; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Design, 1993. Proceedings. The Sixth International Conference on
ISSN :
1063-9667
Print_ISBN :
0-8186-3180-5
Type :
conf
DOI :
10.1109/ICVD.1993.669672
Filename :
669672
Link To Document :
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