High Level Synthesis of Real Time embedded emulating system for Motor controller

With the increasing use of Field Programmable gate arrays (FPAGs) platforms in the academic and industrial fields, circuit´s vendors and design tools developers have to find innovative methodologies and design techniques to facilitate their exploitation. High Level Synthesis (HLS) technique has gain enough maturity to be considered by hardware engineers and to be kept as a practical solution to accelerate the design flow. In this work, we explore the application of this technique in the design of embedded control applications. Our approach consists of the conception and implementation of a Real Time embedded emulating system for a DC Motor (DCM) controller where the hardware design stage is realized by a HLS tool and the motor model is automatically generated from a high description. Performance analysis and hardware synthesis results are presented and discussed through this case study.