DocumentCode
2682936
Title
Hight fault tolerance in neural crossbar
Author
Chabi, Djaafar ; Klein, Jacques-Olivier
Author_Institution
IEF, Univ Paris-sud, Orsay, France
fYear
2010
fDate
23-25 March 2010
Firstpage
1
Lastpage
6
Abstract
Proposed nanometer-scale electronic devices are generally expected to feature an increased probability of manufacturing defects. We present in this paper a novel, highly fault-tolerant architecture, based on memristor crossbar architecture that may enable reliable implementation of neural network. Simulation results of our learning method inspired of Delta rule for monolayer crossbar, exhibits very fast convergence rate to learn Boolean functions. In addition we simulate the impact of defects to measure the ability of our architecture to repair defective neurons, using a competitive learning scheme with or without redundancy. The architecture is able to learn the Boolean functions with manufacturing defect rate up to 13% with reasonable redundancy amount. It shows the best fault-tolerance performance comparing with the other techniques like RMR, von Neumann multiplexing and reconfiguration.
Keywords
Boolean functions; memristors; nanoelectronics; neural nets; Boolean function; Delta rule; competitive learning scheme; convergence rate; fault tolerance; memristor crossbar architecture; monolayer crossbar; nanometer-scale electronic device; neural crossbar; neural network; Boolean functions; Convergence; Fault tolerance; Learning systems; Manufacturing; Memristors; Nanoscale devices; Neural networks; Neurons; Redundancy; Keywords; Neural network; fault tolerance; learning on-chip; memristive crossbar; nano-components; reliability;
fLanguage
English
Publisher
ieee
Conference_Titel
Design and Technology of Integrated Systems in Nanoscale Era (DTIS), 2010 5th International Conference on
Conference_Location
Hammamet
Print_ISBN
978-1-4244-6338-1
Type
conf
DOI
10.1109/DTIS.2010.5487552
Filename
5487552
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