• DocumentCode
    2683910
  • Title

    Temperature and supply voltage aware power modeling of analog functions at system level

  • Author

    Suissa, A. ; Romain, O. ; Denoulet, J. ; Hachicha, K. ; Garda, P.

  • Author_Institution
    LIP6 Lab., Univ. Pierre et Marie Curie, Paris, France
  • fYear
    2010
  • fDate
    23-25 March 2010
  • Firstpage
    1
  • Lastpage
    6
  • Abstract
    Nowadays a system level estimation method of power consumption for heterogeneous systems is a major concern. In this article, we introduce an empirical method for power consumption modeling of analog components at system level. The principal step of this method uses neural networks to approximate the mathematical curve of the power consumption as a function of the inputs, supply voltage and ambient temperature of an analog component. For an amplifier, we found an average error of 4.72% between our high level estimation and PSPICE power consumption results. This novel method is suitable for IP-based design and has three key features. Firstly, the method provides an online estimation of the instantaneous power consumption of analog blocks. Secondly, the method is generic as it can be applied to any analog component in any modeling and simulation environment. Thirdly, the method is suitable for the total (analog and digital) power consumption estimation of a heterogeneous system.
  • Keywords
    SPICE; amplifiers; analogue circuits; high level synthesis; neural nets; power aware computing; IP-based design; PSPICE power consumption; ambient temperature; analog components; analog functions; heterogeneous systems; high level estimation; instantaneous power consumption; mathematical curve; neural networks; online estimation; power consumption estimation; power consumption modeling; supply voltage aware power modeling; system level estimation method; Energy consumption; High power amplifiers; Laboratories; Neural networks; Power supplies; Power system modeling; Registers; SPICE; Temperature; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design and Technology of Integrated Systems in Nanoscale Era (DTIS), 2010 5th International Conference on
  • Conference_Location
    Hammamet
  • Print_ISBN
    978-1-4244-6338-1
  • Type

    conf

  • DOI
    10.1109/DTIS.2010.5487601
  • Filename
    5487601