PBGA for high power: extending the thermal envelope

ULSI devices continue to evolve in the direction of higher pincounts, powers and clock speeds. Current usage of the (cavity up) PBGA has been limited to I/Os of 150-360 and powers of 2-3 W. There is a need to extend the performance characteristics of the PBGA as a low cost packaging alternative for evolving devices. This study reports on the thermal performance of a 400 I/O PBGA design for powers of 7-10 W for PC/Workstation applications. Thermal performance is improved by lowering the resistances to heat flow via junction to board (R_jb), junction to case (R_jc) and case to ambient (R_ca). The case to ambient resistance is lowered by using a heat sink attached to the package, evaluated at forced air flow of 1 m/s, typical for workstation environments. A PBGA package has been developed for a 12.7 mm die on a 29 mm, 2 metal layer substrate. The design utilizes thermal vias to lower the R_jb. R_jc is lowered by decreasing the mold compound thickness. Design parameters for these features are derived and optimized through finite element simulations. Attaching a heatsink to the package is critical for extending the power dissipation from 2-3 W to the 7+ W range. The peripheral area around the PBGA makes it naturally suited for a demountable heatsink attach. An easy clip-on method of heatsink attach is developed as an alternative to the current time-consuming practice of epoxy bonding. Spring loaded clip attach prototypes are designed to minimize interfacial resistance to 0.75°C/W when the heatsink is in dry contact with the mold compound