DocumentCode
2684043
Title
A Parallel VLSI Circuit Layout Methodology
Author
Bapat, S. ; Cohoon, J.P.
Author_Institution
University of Virginia
fYear
1993
fDate
3-6 Jan 1993
Firstpage
236
Lastpage
241
Keywords
Computational complexity; Computer science; Concurrent computing; Design automation; Integrated circuit interconnections; Partitioning algorithms; Rough surfaces; Routing; Surface roughness; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Design, 1993. Proceedings. The Sixth International Conference on
ISSN
1063-9667
Print_ISBN
0-8186-3180-5
Type
conf
DOI
10.1109/ICVD.1993.669686
Filename
669686
Link To Document