DocumentCode :
2684640
Title :
Relationship between profile of stress generated interface traps and degradation of submicron LDD MOSFET´S
Author :
Okhonin, S. ; Hessler, T. ; Dutoit, M.
Author_Institution :
Swiss Federal Institute of Technology
fYear :
1996
fDate :
1996
Firstpage :
1671
Lastpage :
1674
Keywords :
CMOS technology; Degradation; Electric resistance; Interface states; Life estimation; Lifetime estimation; MOSFET circuits; Parameter estimation; Pulse measurements; Stress measurement;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Reliability of Electron Devices, Failure Physics and Analysis, 1996. Proceedings of the 7th European Symposium on
Print_ISBN :
0-7803-3369-1
Type :
conf
DOI :
10.1109/ESREF.1996.888188
Filename :
888188
Link To Document :
https://search.ricest.ac.ir/dl/search/defaultta.aspx?DTC=49&DC=2684640
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