Design techniques and considerations for ultra-low quiescent current power management IC´s

Author

Atrash, Amer ; Smith, Brett ; Teggatz, Ross ; Chen, Wayne ; Krick, John

Author_Institution

Triune Syst., Richardson, TX, USA

fYear

2011

fDate

7-9 Nov. 2011

Firstpage

1

Lastpage

6

Abstract

The increasing prevalence of portable systems powered by limited supplies such as batteries or energy harvesting techniques has created a need for ultra-low quiescent current power management. This paper presents design techniques and other considerations for ultra-low (nA or less) quiescent current power management integrated circuits (IC´s). Topics presented include a zero mask adder robust analog floating gate implementation and a productized nanoSmart® LDO with 20nA operating Iq.

Keywords

energy management systems; integrated circuit design; power integrated circuits; battery technique; current 20 nA; energy harvesting technique; nanoSmart LDO; portable system; ultra-low quiescent current power management IC; ultra-low quiescent current power management integrated circuit; zero mask adder robust analog floating gate implementation; Capacitors; Logic gates; Programming; Regulators; Tunneling; Voltage control; Voltage measurement; Linear circuits; low power electronics;

fLanguage

English

Publisher

ieee

Conference_Titel

Microwaves, Communications, Antennas and Electronics Systems (COMCAS), 2011 IEEE International Conference on

Conference_Location

Tel Aviv

Print_ISBN

978-1-4577-1692-8

Type

conf

DOI

10.1109/COMCAS.2011.6105794

Filename

6105794