Title :
Pixel circuit optimization for imaging applications using integrated circuit technologies
Author :
Venter, Johan ; Sinha, Saurabh
Author_Institution :
Dept. of Electr., Electron. & Comput. Eng., Univ. of Pretoria, Pretoria, South Africa
Abstract :
The most commonly used pixel structure in Integrated Circuit (IC) technologies is the three-transistor pixel structure (3T). This structure consists of a pixel, a reset transistor, as source follower and a pixel select transistor. It has been shown that this structure exhibits the best performance and reliability, although no real in-depth analysis has been previously presented. In this paper, a thorough analysis and optimization of this structure has been done. Simulation results depicting this optimization for the AMS S35D4M5 process is provided to support the mathematical contribution of this paper.
Keywords :
CMOS integrated circuits; MOSFET; heterojunction bipolar transistors; imaging; integrated circuit reliability; integrated circuit technology; optimisation; 3T pixel structure; AMS S35D4M5 process; IC technology; imaging application; in-depth analysis; integrated circuit technology; mathematical contribution; pixel circuit optimization; source follower; three-transistor pixel structure; Integrated circuits; Logic gates; MATLAB; Mathematical model; Optimization; Photonics; Transistors; 3T; BJT; CMOS; HBT; dark current; photon current; pixel; threshold voltage;
Conference_Titel :
Microwaves, Communications, Antennas and Electronics Systems (COMCAS), 2011 IEEE International Conference on
Conference_Location :
Tel Aviv
Print_ISBN :
978-1-4577-1692-8
DOI :
10.1109/COMCAS.2011.6105804
