Title :
Validation of yield models with CMOS/SOS test structures
Author :
Riviere, V. ; Toubul, A. ; Ben Amor, S. ; Gregoris, G.
Author_Institution :
IXL (URA 846-CNRS) Universite Bordeaux
Keywords :
CMOS technology; Circuit testing; Circuit topology; Data analysis; Data mining; Geometry; Performance evaluation; Poisson equations; Quality assurance; Semiconductor device modeling;
Conference_Titel :
Reliability of Electron Devices, Failure Physics and Analysis, 1996. Proceedings of the 7th European Symposium on
Print_ISBN :
0-7803-3369-1
DOI :
10.1109/ESREF.1996.888226
