DocumentCode :
268529
Title :
Yield estimation model for lithography hotspot distortions
Author :
Gómez, S. ; Moll, Francesc
Author_Institution :
Dept. of Electron. Eng., Univ. Politec. de Catalunya, Barcelona, Spain
Volume :
49
Issue :
17
fYear :
2013
fDate :
August 15 2013
Firstpage :
1066
Lastpage :
1068
Abstract :
A yield formulation model to estimate the amount of lithography distortion expected in a printed layout is proposed. The yield formulation relates the probability of non-failure of a lithography hotspot with the yield loss. The application of the yield model is demonstrated for three different layout configurations showing that unidimensional designs may improve manufacturing yield.
Keywords :
distortion; failure analysis; lithography; losses; probability; lithography hotspot distortion; manufacturing yield improvement; nonfailure analysis; printed layout; probability; unidimensional design; yield estimation model; yield loss;
fLanguage :
English
Journal_Title :
Electronics Letters
Publisher :
iet
ISSN :
0013-5194
Type :
jour
DOI :
10.1049/el.2013.0469
Filename :
6583109
Link To Document :
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