DocumentCode :
2685879
Title :
Multi-layer behavioral modeling of charge-pump phase-locked loops
Author :
Liu Ling ; Ji Lijiu
Volume :
2
fYear :
2003
fDate :
21-24 Oct. 2003
Firstpage :
707
Abstract :
A multi-layer modeling approach is proposed in this paper for creating behavioral models of charge-pump phase-locked loops, which offers great flexibility of trading off between the simulation speed and accuracy. Also the approach allows time domain noise simulation with a specific layer. A multi-layer Verilog-A charge-pump PLL model is created to illustrate the proposed approach. A simulation speed up factor of 12 to 99 is achieved with reasonable loss of accuracy.
Keywords :
circuit simulation; phase locked loops; semiconductor device models; Verilog-A model; charge-pump phase-locked loops; multilayer behavioral modeling; multilayer modeling; noise simulation;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
ASIC, 2003. Proceedings. 5th International Conference on
ISSN :
1523-553X
Print_ISBN :
0-7803-7889-X
Type :
conf
DOI :
10.1109/ICASIC.2003.1277308
Filename :
1277308
Link To Document :
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