DocumentCode
2685949
Title
Synthesis of Sequential Circuits for Robust Path Delay Fault Testability
Author
Bhatia, Sandeep ; Jha, Niraj K.
Author_Institution
Princeton University
fYear
1993
fDate
3-6 Jan 1993
Firstpage
275
Lastpage
280
Keywords
Circuit faults; Circuit synthesis; Circuit testing; Combinational circuits; Delay effects; Latches; Logic testing; Robustness; Sequential analysis; Sequential circuits;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Design, 1993. Proceedings. The Sixth International Conference on
ISSN
1063-9667
Print_ISBN
0-8186-3180-5
Type
conf
DOI
10.1109/ICVD.1993.669696
Filename
669696
Link To Document