Title :
Clock-buffer-chip with multiple-target automatic skew compensation
Author :
Watson, R.B., Jr. ; Iknaian, R.B.
Author_Institution :
Digital Equipment Corp., USA
Abstract :
A clock chip accurately delivers low skew (/spl sim/1 ns) clock to the internals of multiple ASICs, correcting for its own process variations as well as remotely correcting for variations in both ASIC clock buffer delay and in module etch electrical length.
Keywords :
application specific integrated circuits; buffer circuits; clocks; compensation; 1 ns; clock-buffer-chip; delay; module etch electrical length; multiple ASICs; multiple-target automatic skew compensation; Application specific integrated circuits; Clocks; Delay lines; Etching; Flip-flops; Propagation delay; Regulators; Semiconductor process modeling; Stress; Temperature;
Conference_Titel :
Solid-State Circuits Conference, 1995. Digest of Technical Papers. 41st ISSCC, 1995 IEEE International
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-7803-2495-1
DOI :
10.1109/ISSCC.1995.535450
