Title :
Process simulation of DRIE and its application in tapered TSV fabrication
Author :
Miao, Min ; Liao, Hongguang ; Wan, Xin ; Zhao, Liwei ; Guo, Yunxia ; Jin, Yufeng
Author_Institution :
Nat. Key Lab. on Micro/Nano Fabrication Technol., Peking Univ., Beijing
Abstract :
TSV (through silicon via ) has been widely welcomed as an enabling technology for three-dimensional integration in a package with high density. The developing of a drilling method for TSVs with tapered sections by experimental methodology can be a tedious task. The authors thus explore the possibility to simulate the process conditions effectively with an in-house developed simulator which utilize hybrid line and cell evolution algorithms. The micro-fabrication using the parameters obtained by the simulation has demonstrated TSVs with tapered sectional profiles and filled with electroplated coppers as expected, which validates the effectiveness of the simulated results.
Keywords :
electronics packaging; sputter etching; cell evolution algorithms; deep reactive ion etching; drilling method; three-dimensional integration; through silicon via; Drilling; Etching; Fabrication; Integrated circuit interconnections; Packaging; Passivation; Plasma applications; Plasma simulation; Silicon; Through-silicon vias;
Conference_Titel :
Electronic Packaging Technology & High Density Packaging, 2008. ICEPT-HDP 2008. International Conference on
Conference_Location :
Shanghai
Print_ISBN :
978-1-4244-2739-0
Electronic_ISBN :
978-1-4244-2740-6
DOI :
10.1109/ICEPT.2008.4606984