Fast structure-aware direct time-domain finite element solver for large-scale on-die power grid simulation

A fast algorithm is developed for the analysis and design of very large-scale on-die power grids. The structure specialty of on-chip power grids such as Manhattan geometry and layered permittivity is preserved in the proposed algorithm, and the resulting disadvantage in time step is overcome. As a result, the large-scale matrix solution encountered in the 3-D power grid analysis is turned into a simple scaling of the solution of a small 1-D tridiagonal matrix, which can be obtained in linear (optimal) complexity with negligible cost. Meanwhile, the time step size is not sacrificed, and the total number of time steps to be simulated is also significantly reduced, thus achieving a total cost reduction in CPU time. Applications to the simulation of very large-scale on-chip power grids on a single core have demonstrated the superior performance of the proposed method.