DocumentCode
2686384
Title
A direct digital frequency synthesizer based on CORDIC algorithm implemented with FPGA
Author
Wang Yang ; Min Hao
Author_Institution
State Key Lab. of ASIC & Syst., Fudan Univ., Shanghai, China
Volume
2
fYear
2003
fDate
21-24 Oct. 2003
Firstpage
832
Abstract
A direct digital frequency synthesizer (DDFS) applied to digital modulation is presented, which can synthesize a 16-bit output sine and cosine wave with a spectrum density of -100 dB at 50 MHz. The synthesizer covers a bandwidth from dc to 25 MHz in steps of 0.18 Hz with latency of 11 clock cycles. The structure is based on CORDIC algorithm. The whole digital system is implemented with FPGA.
Keywords
digital arithmetic; direct digital synthesis; field programmable gate arrays; logic design; 0 to 25 MHz; 50 MHz; CORDIC algorithm; DDFS; FPGA; digital modulation; digital system; direct digital frequency synthesizer; field programmable gate array; look-up-table ROM; output cosine wave; output sine wave;
fLanguage
English
Publisher
ieee
Conference_Titel
ASIC, 2003. Proceedings. 5th International Conference on
ISSN
1523-553X
Print_ISBN
0-7803-7889-X
Type
conf
DOI
10.1109/ICASIC.2003.1277339
Filename
1277339
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