High-speed circuit design using skew-tolerant domino

Dynamic domino circuit is widely used in the high-speed digital circuit design. However, the traditional textbook domino circuit suffers significant timing overhead from clock skew and logic path unbalance which decrease the performance of circuit. In this paper, we design a high-speed adder based on skew-tolerant domino which can improve the circuit performance a lot. We also provide some principles which should be considered in this design.