DocumentCode
2686746
Title
Design of a CMOS charge pump for high-performance phase-locked loop
Author
Xiangguang Xuan ; Feng Ran ; Meihua Xu
Author_Institution
Technol. Center, Shanghai FeiLe Ltd. Co., Shanghai
fYear
2008
fDate
28-31 July 2008
Firstpage
1
Lastpage
4
Abstract
In conventional CMOS charge pump circuits, there are some current mismatching characteristics which result in a phase offset in phase-locked loop circuits. This paper presents a new charge pump circuit after detailed analysis of the current mismatch problem. It combines an error amplifier with reference current sources to achieve good current matching characteristics and lower phase noises, and at the same time it can eliminate charge sharing by using charge removal transistors. The circuit was designed by chartered 0.35 um CMOS technology and simulated by Spectre tools. Simulation results show that the good current matching characteristics can be obtained with the proposed designing scheme.
Keywords
CMOS integrated circuits; integrated circuit design; integrated circuit modelling; integrated circuit noise; phase locked loops; phase noise; CMOS charge pump design; Spectre tools; charge removal transistors; current mismatch problem; error amplifier; high-performance phase-locked loop circuit; phase noise; phase offset; reference current sources; size 0.35 mum; CMOS technology; Charge pumps; Circuit simulation; Clocks; Microelectronics; Phase frequency detector; Phase locked loops; Radio access networks; Voltage control; Voltage-controlled oscillators;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronic Packaging Technology & High Density Packaging, 2008. ICEPT-HDP 2008. International Conference on
Conference_Location
Shanghai
Print_ISBN
978-1-4244-2739-0
Electronic_ISBN
978-1-4244-2740-6
Type
conf
DOI
10.1109/ICEPT.2008.4607016
Filename
4607016
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