DocumentCode :
268705
Title :
PUF Modeling Attacks on Simulated and Silicon Data
Author :
Ruhrmair, U. ; Solter, Jan ; Sehnke, Frank ; Xiaolin Xu ; Mahmoud, Ali ; Stoyanova, V. ; Dror, Gideon ; Schmidhuber, Jürgen ; Burleson, Wayne ; Devadas, Srinivas
Author_Institution :
Tech. Univ. Munchen, München, Germany
Volume :
8
Issue :
11
fYear :
2013
fDate :
Nov. 2013
Firstpage :
1876
Lastpage :
1891
Abstract :
We discuss numerical modeling attacks on several proposed strong physical unclonable functions (PUFs). Given a set of challenge-response pairs (CRPs) of a Strong PUF, the goal of our attacks is to construct a computer algorithm which behaves indistinguishably from the original PUF on almost all CRPs. If successful, this algorithm can subsequently impersonate the Strong PUF, and can be cloned and distributed arbitrarily. It breaks the security of any applications that rest on the Strong PUF´s unpredictability and physical unclonability. Our method is less relevant for other PUF types such as Weak PUFs. The Strong PUFs that we could attack successfully include standard Arbiter PUFs of essentially arbitrary sizes, and XOR Arbiter PUFs, Lightweight Secure PUFs, and Feed-Forward Arbiter PUFs up to certain sizes and complexities. We also investigate the hardness of certain Ring Oscillator PUF architectures in typical Strong PUF applications. Our attacks are based upon various machine learning techniques, including a specially tailored variant of logistic regression and evolution strategies. Our results are mostly obtained on CRPs from numerical simulations that use established digital models of the respective PUFs. For a subset of the considered PUFs-namely standard Arbiter PUFs and XOR Arbiter PUFs-we also lead proofs of concept on silicon data from both FPGAs and ASICs. Over four million silicon CRPs are used in this process. The performance on silicon CRPs is very close to simulated CRPs, confirming a conjecture from earlier versions of this work. Our findings lead to new design requirements for secure electrical Strong PUFs, and will be useful to PUF designers and attackers alike.
Keywords :
application specific integrated circuits; cryptography; evolutionary computation; field programmable gate arrays; learning (artificial intelligence); regression analysis; ASIC; CRP; FPGA; PUF design; PUF modeling attacks; Strong PUF application; Strong PUF unpredictability; XOR Arbiter PUF; challenge-response pairs; computer algorithm; digital model; evolution strategy; feed-forward arbiter PUF; lightweight secure PUF; logistic regression; machine learning technique; numerical modeling attacks; numerical simulation; physical unclonability; physical unclonable functions; ring oscillator PUF architecture; secure electrical Strong PUF; security; silicon data; standard Arbiter PUF; Computer security; Cryptography; Delays; Machine learning; Numerical models; Protocols; Physical unclonable functions; cryptanalysis; machine learning; physical cryptography;
fLanguage :
English
Journal_Title :
Information Forensics and Security, IEEE Transactions on
Publisher :
ieee
ISSN :
1556-6013
Type :
jour
DOI :
10.1109/TIFS.2013.2279798
Filename :
6587277
Link To Document :
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