Investigation of thermal performance of various power-device packages

Continuing trends of miniaturization, rising switching frequencies and increasing packaging densities require increased current handling capability of packaged devices in applications related to power conversion. Traditionally, these ever-increasing demands are met by improvements in silicon efficiency. Nevertheless, with silicon efficiency pushed to the limit, major semiconductor power-device manufacturers are now looking for innovative packaging options for power devices to achieve the next level of breakthroughs in electrical and thermal performance. This paper presents a comprehensive study of thermal behaviors of various powerdevice packages. CFD-based FLOTHERM has been applied to calculate the junction-to-ambient thermal resistance with the industry standard-specified board attachment. Fundamental cooling mechanisms associated with different packaging technologies, including wire-bond, strap bonding, flip chip and ball grid array (BGA), and wafer-level packaging are investigated. The impact of internal package design on the thermal performance of various packages is discussed in detail. A thermal analysis of multichip module for leadless and BGA technologies is also presented.