Title :
Minimization of Logic Functions using essential Signature Sets
Author :
Mcgeer, Patrick ; Sanghavi, Jagesh ; Brayton, Robert ; Vincentelli, Alberto Sangiovanni
Author_Institution :
University of California at Berkeley
Keywords :
Boolean functions; Central Processing Unit; Circuits; Logic functions; Minimization methods; Network synthesis;
Conference_Titel :
VLSI Design, 1993. Proceedings. The Sixth International Conference on
Print_ISBN :
0-8186-3180-5
DOI :
10.1109/ICVD.1993.669704