DocumentCode
2687716
Title
Design of a CMOS built-in current sensor for on-line current testing
Author
Jeong Beom Kim
Volume
2
fYear
2003
fDate
21-24 Oct. 2003
Firstpage
1159
Abstract
This paper proposes a novel CMOS built-in current sensor (BICS) for on-line current testing. Proposed BICS detects abnormal current in circuit under test (CUT) and makes a pass-fail signal through comparison between the CUT current and the duplicated inverter current. Since this BICS does not require the extra clock, the added extra pin is only one output pin. The BICS does not require test mode selection. Therefore the BICS can be applied to on-line current testing. The validity and effectiveness are verified through the HSPICE simulation of circuits with defects. When the CUT is an 8×8 parallel multiplier, the area overhead of the BICS is about 4.34%.
Keywords
CMOS integrated circuits; built-in self test; electric sensing devices; integrated circuit design; integrated circuit testing; CMOS; HSPICE simulation; abnormal current detection; built-in current sensor; circuit under test; inverter current; on-line current testing; pass-fail signal; test mode selection;
fLanguage
English
Publisher
ieee
Conference_Titel
ASIC, 2003. Proceedings. 5th International Conference on
ISSN
1523-553X
Print_ISBN
0-7803-7889-X
Type
conf
DOI
10.1109/ICASIC.2003.1277419
Filename
1277419
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