DocumentCode :
2687797
Title :
Fine geometry and fine pitch bumping process
Author :
Viswanadam, Gautham ; Sathappan, Santhanesh
Author_Institution :
Inst. of Microelectron., Singapore
fYear :
1998
fDate :
8-10 Dec 1998
Firstpage :
18
Lastpage :
24
Abstract :
Photosensitive dry films are widely used in the electronics circuit assembly industry for pattern development. This paper demonstrates the use of dry films in conjunction with solder paste printing for wafer bumping processes. The photosensitive dry films are laminated, exposed and developed to open 30, 50, 60, 75, 100 and 125 μm vias on wafers with thin film under bump metallization (UBM). Ti-Ni-Au thin films are used as UBM for the bumping process. Eutectic Sn/Pb (63 Sn/37 Pb) paste has been used for the printing and bumping process. The study is mainly focused on the bumping process using dry film for direct solder paste printing and the lowest pitch and geometry that can be achieved by this process. This process emphasizes cutting down on processing time in bumping, and favours cost reduction by eliminating the stencil process, which involves fiducial alignment, before reflow. The process development has been divided into three experimental parts: (1) process development for 30, 60, 75, 100 and 125 μm via; (2) film lamination/development/lift-off process optimization on Ti-Ni-Au and electroless Ni-Au UBM metallurgy; (3) solder paste printing and reflow
Keywords :
assembling; circuit optimisation; fine-pitch technology; integrated circuit interconnections; integrated circuit metallisation; integrated circuit packaging; photolithography; photoresists; reflow soldering; 100 micron; 125 micron; 30 micron; 50 micron; 60 micron; 75 micron; Ni-Au; SnPb; Ti-Ni-Au; Ti-Ni-Au thin film UBM; cost reduction; direct solder paste printing; dry films; electroless Ni/Au UBM metallurgy; electronics circuit assembly; eutectic SnPb solder paste; fiducial alignment; film development; film exposure; film lamination; fine geometry bumping process; fine pitch bumping process; lamination; lift-off process optimization; pattern development; photosensitive dry films; process development; processing time; solder paste printing; solder reflow; stencil process elimination; thin film under bump metallization; via size; vias; wafer bumping processes; Assembly; Costs; Electronic circuits; Electronics industry; Geometry; Metallization; Printing; Thin film circuits; Tin; Transistors;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronics Packaging Technology Conference, 1998. Proceedings of 2nd
Print_ISBN :
0-7803-5141-X
Type :
conf
DOI :
10.1109/EPTC.1998.755973
Filename :
755973
Link To Document :
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