Fractional-N PLL optimization for highly linear wideband chirp generation for FMCW radars

This work addresses the optimization of Fractional-N Phase Locked Loops (Frac-N PLLs) used to produce frequency chirps for Frequency Modulated Continuous Wave (FMCW) radar applications. In a Frac-N PLL, we have two main clock domains which are the reference and the divided clock domains. Clock domain crossings have to be considered during chirp generation to produce highly linear chirps. Moreover, with wideband chirps, integer divide ratio increments during chirp generation may cause transient frequency glitches which also affect the chirp linearity if not taken care of. In this work we propose techniques to address these issues in Frac-N PLLs. The proposed techniques lead to highly linear wideband chirp generation and thus improve the distance calculation accuracy by a factor of 2 and the distance calculation precision by a factor of 1.5.