DocumentCode :
2688300
Title :
Hardware solution for detection and prevention of buffer overflow attacks
Author :
Zhang Yuhong ; Yan Xiaolang
Author_Institution :
VLSI Inst., Zhejiang Univ., Hangzhou, China
Volume :
2
fYear :
2003
fDate :
21-24 Oct. 2003
Firstpage :
1304
Abstract :
This paper proposed a new hardware solution for detection and prevention of stack-smashing attacks. A number is kept as key in CPU to encrypt return address. The cipher return address is inserted between stack frames. The plain return address is pushed to stack as conventional. If the both return addresses loaded back mismatch when subroutine returns, buffer overflow is then detected and exception is incurred to prevent malicious attack. All the excessive stack operations are implemented by adding specific hardware circuits in CPU. These operation and hardware modification are transparent to software. The performance overhead can be ignored due to parallel execution units in the CPU architecture.
Keywords :
buffer storage; computer architecture; integrated circuit design; CPU; buffer overflow attacks; cipher return address; hardware circuits; hardware solution; integrated circuits; microarchitecture; parallel execution units; performance overhead; stack frames; stack-smashing attacks;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
ASIC, 2003. Proceedings. 5th International Conference on
ISSN :
1523-553X
Print_ISBN :
0-7803-7889-X
Type :
conf
DOI :
10.1109/ICASIC.2003.1277456
Filename :
1277456
Link To Document :
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