DocumentCode :
2688827
Title :
Q20D080 analog RAM logic array
Author :
Blake, C. ; Hollabaugh, M.
fYear :
1989
fDate :
15-18 May 1989
Abstract :
An ECL (emitter-coupled logic)-structured array containing 1520 logic cells, 2560 bits of RAM, and a customizable analog section is described. The special needs of high performance VLSI testers was the driving force behind its organization and architecture. The chip is fabricated with a trench isolation bipolar process with 1-μm features, double layers of polysilicon, and triple layers of metallization
Keywords :
application specific integrated circuits; bipolar integrated circuits; emitter-coupled logic; logic arrays; random-access storage; 1 micron; 2560 bit; ASIC; Q20D080; RAM logic array; Si; customizable analog section; double layer polysilicon; emitter-coupled logic; high performance VLSI testers; trench isolation bipolar process; triple layer metallisation;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Custom Integrated Circuits Conference, 1989., Proceedings of the IEEE 1989
Conference_Location :
San Diego, CA, USA
Type :
conf
DOI :
10.1109/CICC.1989.56762
Filename :
5726229
Link To Document :
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