Title :
A codec with on-chip digital echo canceller
Author :
Friedman, V. ; Khoury, J.M. ; Loporcaro, L.J. ; Theobald, M. ; Fields, E.M. ; Tompsett, M.F. ; Gopal, V.P. ; Lustro, G.L. ; Figueroa, M.
Abstract :
A 1.5-μm CMOS codec, using Σ-Δ conversion techniques, which incorporates the hybrid echo cancellation on chip, is described. The echo cancellation is done in two states, using an analog hybrid to reduce the echo level at the input of the A/D converter and a programmable digital balance filter. The limiting effects of the variation of the analog components on the echo cancellation performance of the device are minimized, so that only one set of coefficients per national standard is necessary
Keywords :
CMOS integrated circuits; codecs; data conversion; echo suppression; 1.5 micron; A/D converter; CMOS; analog hybrid; codec; digital echo canceller; hybrid echo cancellation; monolithic IC; onchip canceller; programmable digital balance filter; sigma-dealt conversion;
Conference_Titel :
Custom Integrated Circuits Conference, 1989., Proceedings of the IEEE 1989
Conference_Location :
San Diego, CA, USA
DOI :
10.1109/CICC.1989.56770