Title :
Multiple Instruction Issue And Single-chip Processors
Author :
Pleszkun, A.R. ; Sohi, G.S.
Author_Institution :
University of Colorado-Boulder
fDate :
Nov. 30 1988-Dec. 2 1988
Keywords :
Clocks; Computer architecture; Concurrent computing; Degradation; Hardware; Microprogramming; Parallel processing; Performance gain; Pipeline processing; VLIW;
Conference_Titel :
Microprogramming and Microarchitecture, 1988., Proceeding of the 21st Annual Workshop on
Conference_Location :
San Diego, CA, USA
Print_ISBN :
0-8186-1919-8
DOI :
10.1109/MICRO.1988.639256
