DocumentCode

2689329

Title

Multiple Instruction Issue And Single-chip Processors

Author

Pleszkun, A.R. ; Sohi, G.S.

Author_Institution

University of Colorado-Boulder

fYear

1988

fDate

Nov. 30 1988-Dec. 2 1988

Firstpage

64

Lastpage

66

Keywords

Clocks; Computer architecture; Concurrent computing; Degradation; Hardware; Microprogramming; Parallel processing; Performance gain; Pipeline processing; VLIW;

fLanguage

English

Publisher

ieee

Conference_Titel

Microprogramming and Microarchitecture, 1988., Proceeding of the 21st Annual Workshop on

Conference_Location

San Diego, CA, USA

ISSN

0194-1895

Print_ISBN

0-8186-1919-8

Type

conf

DOI

10.1109/MICRO.1988.639256

Filename

639256