Title :
Detecting stuck-open faults with stuck-at test sets
Author :
Millman, Steven D. ; McCluskey, Edward J.
Abstract :
Simulations of CMOS combinational circuits have been conducted to determine the relationship between stuck-at and stuck-open fault coverage. The results suggest that node activity is more important to stuck-open fault coverage than test length by itself. Reordering test sets so that node activity is increased resulted in increased stuck-open fault coverage. It is important to note that the reordering of the test sets requires an analysis of fault-free simulations; no fault simulations need to be done. It has been shown that all but some minimum-length test sets can easily achieve the 75% stuck-open fault coverage required by the DoD (US Department of Defense), and pseudorandom tests, which have high measures of node activity, can be expected to have over 90% stuck-open fault coverage
Keywords :
CMOS integrated circuits; circuit analysis computing; combinatorial circuits; integrated circuit testing; integrated logic circuits; logic testing; CMOS combinational circuits; digital simulation; fault-free simulations; logic testing; node activity; pseudorandom tests; stuck-at test sets; stuck-open fault coverage; test length; test sets reordering;
Conference_Titel :
Custom Integrated Circuits Conference, 1989., Proceedings of the IEEE 1989
Conference_Location :
San Diego, CA, USA
DOI :
10.1109/CICC.1989.56809
