PANDA-a hierarchical mixed mode VLSI module assembler

A description is given of PANDA, a hierarchical, constraint-based mixed-mode VLSI module assembler. PANDA was developed as a testbed for exploring VLSI design methods and tools. It uses pitchmatching and abutment as the primary assembly technique with channel and river routers available as options. PANDA features a recursive compaction algorithm using depth-first searching, constraint resolution, and wire-length minimization to optimize layout area, while maintaining the input hierarchy. Instead of using a predetermined stand-off distance between cells, PANDA´s abutment algorithm calculates the minimum distance required to guarantee no design-rule errors between modules. PANDA has the unique ability to assemble mixed-mode layouts, which are defined as a mixture of fixed-grid cells, such as hand layouts, and symbolic cells (virtual-grid), and places few constraints on the hierarchical description. Hierarchical models of over 70 K transistors have been assembled with layout densities as good as or better than achieved with hand layout