Non-volatile Spin-Transfer Torque RAM (STT-RAM): An analysis of chip data, thermal stability and scalability

Author

Driskill-Smith, A. ; Watts, S. ; Apalkov, D. ; Druist, D. ; Tang, X. ; Diao, Z. ; Luo, X. ; Ong, A. ; Nikitin, V. ; Chen, E.

Author_Institution

Grandis, Inc., Milpitas, CA, USA

fYear

2010

fDate

16-19 May 2010

Firstpage

1

Lastpage

3

Abstract

In this paper, we present a detailed analysis of our latest statistical MTJ switching data and STT-RAM chip results. We analyze STT-RAM thermal stability and, for the first time, compare the thermal stability parameter obtained from pulse-width dependence measurements with that obtained from read disturb measurements. We also analyze the scalability of STT-RAM, and compare the properties of STT-RAM with both in-plane and perpendicular orientations of the MTJ magnetization.

Keywords

CMOS memory circuits; integrated circuit testing; magnetic tunnelling; random-access storage; spin polarised transport; thermal stability; DRAM; MTJ magnetization; MTJ storage element; NOR flash; SRAM; STT-RAM chip results; STT-RAM memory cell; STT-RAM thermal stability; access transistor; chip data; magnetic tunnel junction storage element; multilevel cell architectures; nonvolatile memory technology; nonvolatile spin-transfer torque RAM; pulse-width dependence measurements; read disturb measurements; scalability; single-level STT-RAM cell; spin-transfer torque random access memory; standard CMOS processes; statistical MTJ switching data; thermal stability parameter; Data analysis; Magnetic analysis; Pulse measurements; Scalability; Semiconductor device measurement; Space vector pulse width modulation; Stability analysis; Thermal stability; Time measurement; Torque;

fLanguage

English

Publisher

ieee

Conference_Titel

Memory Workshop (IMW), 2010 IEEE International

Conference_Location

Seoul

Print_ISBN

978-1-4244-6719-8

Electronic_ISBN

978-1-4244-7668-8

Type

conf

DOI

10.1109/IMW.2010.5488325

Filename

5488325