DocumentCode :
2691851
Title :
FEDRAM: A DRAM cell based on ferroelectric-gated field-effect transistor
Author :
Ma, T.P.
Author_Institution :
Dept. of Electr. Eng., Yale Univ., New Haven, CT, USA
fYear :
2009
fDate :
22-24 June 2009
Firstpage :
231
Lastpage :
234
Abstract :
A capacitor-less DRAM cell based on ferroelectric-gate memory transistor structure is presented. Compared to the conventional DRAM cell, it offers much simpler cell structure, easier scaling, longer retention time, and lower power consumption. Cell size of 4F2 can be realized. It is also most suitable for embedded applications.
Keywords :
DRAM chips; ferroelectric storage; field effect transistors; low-power electronics; FEDRAM; dynamic RAM; ferroelectric-gated field-effect transistor; power consumption; retention time; FETs; Iron; Random access memory;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Device Research Conference, 2009. DRC 2009
Conference_Location :
University Park, PA
Print_ISBN :
978-1-4244-3528-9
Electronic_ISBN :
978-1-4244-3527-2
Type :
conf
DOI :
10.1109/DRC.2009.5354843
Filename :
5354843
Link To Document :
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