DocumentCode
2692147
Title
Multi-algorithm targeted low memory bandwidth architecture for H.264/AVC integer-pel motion estimation
Author
Lee, Jae Hun ; Yoo, Kiwon
Author_Institution
Digital Media R&D Center, Samsung Electron. Co., Ltd., Daegu
fYear
2008
fDate
June 23 2008-April 26 2008
Firstpage
701
Lastpage
704
Abstract
This paper presents a hardware oriented algorithm and its architecture of an integer-pel motion estimation for H.264/AVC. A variation of search algorithm from full search to fast search can be realized on a common framework in the proposed architecture. Proposed motion estimation architecture has a capability of real-time processing for 1080@60P with 2 reference frames and a search range of [-2048, +2047] in the horizontal and [-64, +63] in the vertical direction at the operating frequency of 266 MHz.
Keywords
motion estimation; video coding; H.264/AVC; frequency 266 MHz; hardware oriented algorithm; integer-pel motion estimation; multialgorithm targeted low memory bandwidth architecture; Automatic voltage control; Bandwidth; Memory architecture; Motion estimation; H.264/AVC; hardware architecture; motion estimation;
fLanguage
English
Publisher
ieee
Conference_Titel
Multimedia and Expo, 2008 IEEE International Conference on
Conference_Location
Hannover
Print_ISBN
978-1-4244-2570-9
Electronic_ISBN
978-1-4244-2571-6
Type
conf
DOI
10.1109/ICME.2008.4607531
Filename
4607531
Link To Document