• DocumentCode
    2693633
  • Title

    Hybrid TiN nanocrystals/Si3N4 nonvolatile memory featuring low voltage operation by spinodal phase segregation

  • Author

    Chen, Lun-Lun ; Chang, Chia-Hsuan ; Lin, Yuan-Sheng ; Wu, Yung-Hsien

  • Author_Institution
    Dept. of Eng. & Syst. Sci., Nat. Tsing-Hua Univ., Hsinchu, Taiwan
  • fYear
    2009
  • fDate
    22-24 June 2009
  • Firstpage
    143
  • Lastpage
    144
  • Abstract
    Summary form only given. Hybrid nonvolatile memory with Si nanocrystals embedded in the Si3N4 has demonstrated higher operation speed than a plain silicon-oxide-nitride-oxide-silicon (SONOS) memory while maintaining better retention characteristic than a pure Si nanocrystal memory. Based on this concept, TiN nanocrystals embedded in the Al2O3 have exhibited improved memory characteristics. Because Si3N4 has been verified to possess more trapping sites than AI2O3, TiN nanocrystals three-dimensionally embedded in the Si3N4 film was studied in this work as the charge trapping layer. In fact, three-dimensionally incorporating metal nanocrystals in the Si3N4 (double heterogeneous stack) has been previously investigated and presented better memory performance than that with single heterogeneous stack. However, the formation of this double heterogeneous floating-gate requires sequential deposition of Si3N4 and metal nanocrystals which is relatively complicated and necessitates rigorous process parameter control. To address this issue, a single co-sputtering process was explored to achieve the hybrid memory structure by spinodal phase segregation.
  • Keywords
    aluminium compounds; low-power electronics; nanoelectronics; nanostructured materials; random-access storage; semiconductor storage; silicon compounds; tin compounds; Al2O3; Si3N4; TiN; charge trapping layer; cosputtering process; double heterogeneous floating-gate; hybrid memory structure; hybrid nanocrystals; hybrid nonvolatile memory; low voltage operation; memory characteristics; metal nanocrystals; nanocrystal memory; process parameter control; silicon-oxide-nitride-oxide-silicon memory; spinodal phase segregation; trapping sites; Aluminum oxide; Annealing; Capacitance-voltage characteristics; Clocks; Hysteresis; Nanocrystals; Nonvolatile memory; SONOS devices; Threshold voltage; Tin;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Device Research Conference, 2009. DRC 2009
  • Conference_Location
    University Park, PA
  • Print_ISBN
    978-1-4244-3528-9
  • Electronic_ISBN
    978-1-4244-3527-2
  • Type

    conf

  • DOI
    10.1109/DRC.2009.5354957
  • Filename
    5354957