• DocumentCode
    2695369
  • Title

    Testability aspects of a DSP based image processing system

  • Author

    Moorehead, J.D. ; Harvey, D.M.

  • Author_Institution
    Liverpool John Moores Univ., UK
  • fYear
    1995
  • fDate
    34815
  • Firstpage
    42552
  • Lastpage
    42554
  • Abstract
    The Coherent and Electro-Optics Research Group at Liverpool John Moores University has designed and developed several desktop imaging systems for industrial and medical applications. In 1991 a system based on a TMS320C30 DSP circuit board was produced to perform image correlation tasks. The board eventually demonstrated the power of the ´C30, but it also highlighted the need for new test protocols when commissioning boards with high density PGA and surface mount components. Since 1992 the group has been developing a new board based on the next generation TMS320C40 DSP. In order to minimise foreseeable development problems, the board has been designed for test using implementations of the IEE1149.1 boundary scan standard. This paper describes the imaging system, the processor board and the testability aspects associated with its development
  • Keywords
    boundary scan testing; design for testability; digital signal processing chips; image processing equipment; standards; DSP based image processing system; IEE1149.1 boundary scan standard; TMS320C40 DSP chip; imaging system; processor board; testability aspects;
  • fLanguage
    English
  • Publisher
    iet
  • Conference_Titel
    Systems Design for Testability, IEE Colloquium on
  • Conference_Location
    London
  • Type

    conf

  • DOI
    10.1049/ic:19950553
  • Filename
    477998